datasheet low emi clock generator ICS180-01 idt? / ics? low emi clock generator 1 ICS180-01 rev d 051310 description the ICS180-01 generates a low emi output clock from a clock or crystal input. the device uses idt?s proprietary mix of analog and digital phase locked loop (pll) technology to spread the frequency spectrum of the output, thereby reducing the frequency amplitude peaks by several db. the ICS180-01 offers down spread selection of -1.25% and -3.75%. refer to the mk1714-01/02 for the widest selection of input freq uencies and multipliers. idt offers a complete line of emi reducing clock generators. consult us when you need to remove crystals and oscillators from your board. features ? pin and function compatible to cypress w180-01 ? packaged in 8-pin soic ? provides a spread spectrum output clock ? accepts a clock input and provides same frequency dithered output ? input frequency of 8 to 28 mhz ? peak reduction by 7db - 14db typical on 3rd - 19th odd harmonics ? spread percentage selection for -1.25% and -3.75% ? operating voltage of 3.3 v and 5 v ? advanced, low-power cmos process ? industrial temperature range available block diagram pll clock synthesis and spread spectrum circuitry ss% clk gnd vdd fs2:1 x1/clkin x2 clock buffer/ crystal oscillator
ICS180-01 low emi clock generator sscg idt? / ics? low emi clock generator 2 ICS180-01 rev d 051310 pin assignment spread spectrum select table 0 = connect to gnd 1 = connect directly to vdd note: ss% pin has an internal pull-up resistor frequency range selection table pin descriptions 1 2 3 x1/clkin 4 x2 gnd fs1 ss% vdd clkout 8 7 6 5 fs2 8-pin (150 mil) soic ss% (pin 4) spread direction spread percentage (%) 0 down -1.25% 1 down -3.75% fs2 (pin 8) fs1 (pin 7) frequency range selection (mhz) 00 8-10 0 1 10-15 1 0 15-18 1 1 18-28 pin number pin name pin type pin description 1 x1/clkin input crystal or clock input. 2 x2 output crystal output. float for a clock input. 3 gnd power connect to ground. 4 ss% input select pin for spread amount. see table above. internal pull-up resistor. 5 clkout output spread spectrum clock output per table above. 6 vdd power connect to 3.3 v or 5 v. 7 fs1 input select pin for input frequency. see table above. internal pull-up resistor. 8 fs2 input select pin for input frequency. see table above. internal pull-up resistor.
ICS180-01 low emi clock generator sscg idt? / ics? low emi clock generator 3 ICS180-01 rev d 051310 external components the ICS180-01 requires a minimum number of external components for proper operation. decoupling capacitor a decoupling capacitor of 0.01f must be connected between vdd and gnd on pins 6 and 3, as close to these pins as possible. for optimum device performance, the decoupling capacitor should be mounted on the component side of the pcb. avoid the use of vias in the decoupling circuit. series termination resistor when the pcb trace between the clock output and the load is over 1 inch, series termination should be used. to series terminate a 50 ? trace (a commonly used trace impedance) place a 33 ? resistor in series with the clock line, as close to the clock output pin as possible. the nominal impedance of the clock output is 20 ? . value of these capacitors is given by the following equation: pcb layout recommendations for optimum device performance and lowest output phase noise, the following guidelines should be observed. 1) the 0.01f decoupling capacitor should be mounted on the component side of the board as close to the vdd pin as possible. no vias should be used between the decoupling capacitor and vdd pin. the pcb trace to vdd pin should be kept as short as possible, as should the pcb trace to the ground via. 2) to minimize emi, the 33 ? series termination resistor (if needed) should be placed close to the clock output. 3) an optimum layout is one with all components on the same side of the board, minimizing vias through other signal layers. other signal traces should be routed away from the ICS180-01. this includes signal traces just underneath the device, or on layers adjacent to the ground plane layer used by the device.
ICS180-01 low emi clock generator sscg idt? / ics? low emi clock generator 4 ICS180-01 rev d 051310 absolute maximum ratings stresses above the ratings listed below can cause permanent damage to the ICS180-01. these ratings, which are standard values for idt commercially rated par ts, are stress ratings only. functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods can affect product reliability. electrical parameters are guaranteed only over the recommended operating temperature range. recommended operation conditions item rating supply voltage, vdd 7 v all inputs and outputs -0.5 v to vdd+0.5 v ambient operating temperature (commercial) 0 to +70 c ambient operating temperature (industrial) -40 to +85 c storage temperature -65 to +150 c junction temperature 125 c soldering temperature 260 c parameter min. typ. max. units ambient operating temperature -40 +85 c power supply voltage (measured in respect to gnd) +3.135 +5.5 v
ICS180-01 low emi clock generator sscg idt? / ics? low emi clock generator 5 ICS180-01 rev d 051310 dc electrical characteristics unless stated otherwise, vdd = 3.3 v 5% , ambient temperature -40 to +85 c unless stated otherwise, vdd = 5 v, 10% , ambient temperature -40 to +85 c parameter symbol conditions min. typ. max. units operating voltage vdd 3.135 3.465 v supply current idd no load 18 32 ma input high voltage v ih 2.4 v input low voltage v il 0.8 v output high voltage v oh i oh = -4 ma vdd-0.4 v output high voltage v oh i oh = -15 ma 2.4 v output low voltage v ol i ol = 15 ma 0.4 v input capacitance c in 57pf output impedance rout 25 ? input pull-up resistor 500 k ? power-up time first locked clock cycle after steady power 5ms parameter symbol conditions min. typ. max. units operating voltage vdd 4.5 5 5.5 v supply current idd no load 30 50 ma input high voltage v ih 0.7vdd v input low voltage v il 0.15vdd v output high voltage v oh i oh = -24 ma 2.4 v output low voltage v ol i ol = 24 ma 0.4 v output impedance rout 20 ohms input capacitance c in 57pf output impedance rout 25 ? input pull-up resistor 500 k ? power-up time first locked clock cycle after steady power 5ms
ICS180-01 low emi clock generator sscg idt? / ics? low emi clock generator 6 ICS180-01 rev d 051310 ac electrical characteristics unless stated otherwise, vdd = 3.3 v5% or 5 v10% , ambient temperature -40 to +85 c, c l =15 pf note 1: measured with 15 pf load thermal characteristics parameter symbol conditions min. typ. max. units input/output frequency 8 28 mhz input clock duty cycle time above vdd/2 40 60 % output clock duty cycle note 1 40 50 60 % output rise time t or 0.8 to 2.4 v, note 1 2 5 ns output fall time t of 2.4 to 0.8 v, note 1 2 5 ns jitter cycle-to-cycle 250 300 ps parameter symbol conditions min. typ. max. units thermal resistance junction to ambient ja still air 150 c/w ja 1 m/s air flow 140 c/w ja 3 m/s air flow 120 c/w thermal resistance junction to case jc 40 c/w
ICS180-01 low emi clock generator sscg idt? / ics? low emi clock generator 7 ICS180-01 rev d 051310 marking diagram (ics180m-01lf) marking diagram (ics180mi-01lf) notes: 1. ###### is the lot number. 2. yyww is the last two digits of the year and week that the part was assembled. 3. ?l? or ?lf? denotes pb (lead) free package. 4. ?i? denotes industrial temperature range. 5. bottom marking: country of origin. 180m01lf ###### yyww 14 5 8 180mi01l ###### yyww 14 5 8
ICS180-01 low emi clock generator sscg idt? / ics? low emi clock generator 8 ICS180-01 rev d 051310 package outline and package dimensions (8-pin soic, 150 mil. body) package dimensions are kept current with jedec publication no. 95 ordering information parts that are ordered with a ?lf? suffix to the part nu mber are the pb-free configur ation and are rohs compliant. while the information presented herein has been checked for both accuracy and reliability, idt assumes no responsibility for either its use or for the infringement of any patents or other ri ghts of third parties, which would result from its use. no oth er circuits, patents, or licenses are implied. this product is intended for use in normal commercial applications. any other applications su ch as those requiring extended temperature range, high reliability , or other extraordinary environmental requirements are not recommended without additional processing by idt. idt reserves the right to change any circuitry or specifications without notice. idt does not authorize or warrant any idt product for use in life support devices or critical medical instruments. part / order number marking shipping packaging package temperature 180m-01lf see page 6 tubes 8-pin soic 0 to +70 c 180m-01lft tape and reel 8-pin soic 0 to +70 c 180mi-01lf see page 6 tubes 8-pin soic -40 to +85 c 180mi-01lft tape and reel 8-pin soic -40 to +85 c index area 1 2 8 d e seating plane a1 a e - c - b .10 (.004) c c l h h x 45 millimeters inches symbol min max min max a 1.35 1.75 .0532 .0688 a1 0.10 0.25 .0040 .0098 b 0.330.51.013.020 c 0.19 0.25 .0075 .0098 d 4.80 5.00 .1890 .1968 e 3.80 4.00 .1497 .1574 e 1.27 basic 0.050 basic h 5.80 6.20 .2284 .2440 h 0.250.50.010.020 l 0.401.27.016.050 0 8 0 8
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